Skip to main content
Scour
Browse
Getting Started
Login
Sign Up
You are offline. Trying to reconnect...
Close
You're currently offline. Some features may not work.
Close
Copied to clipboard
Close
Unable to share or copy to clipboard
Close
⚡ Cache Optimization
Data Locality, Cache-Friendly Code, Memory Hierarchy, Performance
Filter Results
Timeframe
Fresh
Past Hour
Today
This Week
This Month
Feeds to Scour
Subscribed
All
Scoured
83272
posts in
1.07
s
Concurrency
Deep Dive: Memory Models, Lock-Free, and
RCU
dev.to
·
3h
·
Discuss:
DEV
🧠
Memory Models
KV-CoRE: Benchmarking Data-Dependent Low-Rank
Compressibility
of
KV-Caches
in LLMs
arxiv.org
·
1d
💾
Cache Algorithms
Stratum
: Architecting a
Configurable
Cache Simulator with C++ and Racket
thecloudlet.github.io
·
5d
·
Discuss:
Hacker News
💾
Cache Algorithms
CUDA
Guide:
Workflow
for Performance Tuning
digitalocean.com
·
2d
🧠
Memory Hierarchy
How
WebAssembly
and Web Workers prevent UI
freezes
thenewstack.io
·
40m
🌐
WASM Runtimes
Efficiency
and Performance
dev.to
·
3h
·
Discuss:
DEV
⚡
Performance
SPPAM
: Signature Pattern Prediction and Access-Map
Prefetcher
arxiv.org
·
2d
⚡
Cache-Aware Algorithms
Memory
Mania
: How a Once-in-Four-Decades Shortage Is
Fueling
a Memory Boom
newsletter.semianalysis.com
·
1d
🔗
Memory Linearization
Lessons from
BF-Tree
: Building a
Concurrent
Larger-Than-Memory Index in Rust
zhihanz.github.io
·
2d
·
Discuss:
Hacker News
🧠
Memory Consistency
zmem-org/ZMEM
: Extremely fast binary message format with minimal memory
overhead
and zero copy access
github.com
·
21h
·
Discuss:
Hacker News
💾
Zero-Copy
Continual
learning and the post
monolith
AI era
baseten.co
·
19h
·
Discuss:
Hacker News
🧠
Memory Models
MicroBlaze
MCS Seven-Segment Counter on
Basys
3 FPGA
hackster.io
·
1h
🤖
Embedded Go
Zinc
Language Design
ziggit.dev
·
8h
🔧
Nickel
Hello Edge: Keyword
Spotting
on
Microcontrollers
paperium.net
·
20h
·
Discuss:
DEV
🔌
Microcontrollers
An Analysis of User-space
Idle
State Instructions on
x86
Processors
danglingpointers.substack.com
·
2d
·
Discuss:
Substack
📅
Instruction Scheduling
Great Power, Great
Latency
: The Spider-Sense of
NUMA
Tuning
mydbanotebook.org
·
2d
⚡
Cache-Aware Algorithms
Weeknotes
2026-W06
› Project
Pterodactyl
: incremental architecture
jonmsterling.com
·
1h
·
Discuss:
Hacker News
🔬
Nanopasses
I Built a 6
BIPS
JIT
in Five Months
unlikelyemphasis.substack.com
·
1d
·
Discuss:
Substack
📜
Bytecode Interpreters
I
struggled
with system design until I learned these 114
concepts
newsletter.systemdesign.one
·
3h
🗄️
Database Engines
The best
RAM
upgrade isn't always more
capacity
xda-developers.com
·
2d
⚡
Performance
Loading...
Loading more...
Page 2 »
Keyboard Shortcuts
Navigation
Next / previous item
j
/
k
Open post
o
or
Enter
Preview post
v
Post Actions
Love post
a
Like post
l
Dislike post
d
Undo reaction
u
Recommendations
Add interest / feed
Enter
Not interested
x
Go to
Home
g
h
Interests
g
i
Feeds
g
f
Likes
g
l
History
g
y
Changelog
g
c
Settings
g
s
Browse
g
b
Search
/
Pagination
Next page
n
Previous page
p
General
Show this help
?
Submit feedback
!
Close modal / unfocus
Esc
Press
?
anytime to show this help